YFL elite Co., Ltd.

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Home      Press Release 27 August 2010

YFL elite is proud to partner with the ChipEstimate.com
to offer the advanced IP for fully autonomous IC self-testing and security

Press Release 27 August 2010

YFL elite has partnered with the ChipEstimate.com and is offering its advanced IP in IC self-testing and security through the ChipEstimate.com portal.

"The ChipEstimate.com portal complements our IP based business model perfectly. We are very lucky the ChipEstimate.com system is available for our advantage."

The company's core IP portfolio includes the TSTS (Total Self-Test Solution) class IP - based on the patented AMBIST method - for the full-autonomous on-chip self-testing of logic and memory devices, and the SEAcure class IP - based on the patented SEA - offers a one-solution technology that can cover all the most fundamental security requirements of information and communication security applications comprehensively.

Most information and communication technology implementations have a common set of fundamental security requirements, the most basic ones are: data security, authenticity, and error detection or checking. In addition, defensive measures against some of the most common and effective security attacks against information and communication technologies - such as the replay and the known-plain-text - have already long became a necessity. Past security implementations must employ a mixture of multiple solutions and technologies to cover these basic requirements for the information and communication security. The SEA offers a comprehensive one-solution technology which can cover all the common fundamental security requirements of information and communication technologies.

The SEA is a ternary capability crypto algorithm which generates cipher and signature integrally and having OTSC characteristic. The OTSC stands for one-time-signatue-cipher. It means that even for a constant unchanged message piece, each the cipher and signature pair generated with the SEA at different times, is so dramatically different that each effectively appears to be random bits. This ternary capability comprehensively satisfied the fundamental security requirements of information and communication technologies in data security, authenticity, and error detection or checking; and is even with intrinsic capability to defend against many security attacks - including the highly effective and very common replay and known-plain-text.

To attain similar capabilities to the SEA, past technologies must mix and combine multiple algorithms and techniques. For example, at the equivalent level security strength, past technologies must combine at least the AES for making ciphers and the DSS for making signatures. And unlike the SEA is with the OTSC characteristic intrinsically, neither the DSS nor the AES has such a capability built-in; the signature or the cipher generated for an unchanged constant message will be identical every time; additional extrinsic techniques must be added to implement additional defenses such as against attacks like the replay or the know-plain-text. The SEA offers a comprehensive one-solution technology which is much more efficient and reliable than previous means. The efficiency also makes it possible to implement high security strength technology into many more applications - such as the RKE - where strict energy constraints had limited the ability to use higher-end security technologies. The SEA has enabled implementation of premier level security into devices like the SRKE and makes possible for pioneering solution as the chip authentication technology.

The AMBIST is a fully autonomous on-chip self-test method which generates very high quality virtually random test patterns based on the NIST SHS one-way hash functions; thus, virtually unlimited number of the test patterns are available with extremely low probability to ever repeat. Additionally, the same one-way hash function is also used to generate a short signature out of the entire test response data on-the-fly; thus, the test time that used to be required by external ATE would no longer apply to chips with the AMBIST. Chips using the AMBIST will no longer need sophisticated and high performance ATE, there is no test pattern to load-in or test repose to read out, just simple hardware to start the self-test and read the highly reliable test result signature out. This eliminates the test time based test cost structure, and can also be much easier and cheaper to test the devices at-speed.

The AMBIST IP can test memory blocks directly or coupled with internal scanchain memory elements to test logics. This IP is highly suitable for most today's large logic and memory chips, and can significantly reduce the test costs and improve the test quality and efficiency by giving the capability to run the full tests fully autonomously on-chip. And in addition to the cost and efficiency advantages, the solution also improves security for all the chips by eliminating direct external access to the logics (through the scanchains), and radically reduces pads and pins that had been required for intensive external test access by the traditional ATE.

"YFL elite is committed to bring forward our advantageous IP for the design community. We will continue to work closely with the ChipEstimate.com and make more IP available through the portal in coming weeks."